Motorola 68020

The 68020 design was finished in the summer of 1983 and Motorola announced it in June 1984, at 487 dollars each. It was the answer to the growth of workstations, which wanted more speed and more memory than the 68000 could give.

Motorola calls it the family's first full 32-bit implementation: registers, internal paths, data bus and address bus, all 32 bits wide. The arithmetic unit also became 32-bit, so a 32-bit addition no longer has to be done in two halves.

With 32 address lines, the 68020 reaches 4 GB of memory, 256 times what the 68000 could reach. It has a 256-byte instruction cache: a small memory inside the chip that holds recently used instructions, so that loops don't always have to go out to main memory. It was the first 68k with a true cache.

The processor works like an assembly line, with a three-stage pipeline: while one instruction is being executed, the next is already being decoded and the one after that being fetched. It has 18 addressing modes, against the 68000's 14, including memory indirect addressing and scaled indexes, useful for C and Pascal compilers. It brought bit-field instructions, handy for graphics, and 32-bit multiplications and divisions.

The bus adjusts itself to the width of whatever is on the other side: 8, 16 or 32 bits, cycle by cycle. And alignment restrictions went away: reading a word at an odd address no longer causes an error.

It has no floating-point maths or memory management on chip. For that it has a coprocessor interface that accepts up to eight, such as the 68881 or 68882 maths coprocessor and the 68851 memory management unit.

The 68EC020 is the budget version, intended for embedded systems. According to Motorola's manual, the main differences are the 24-bit address bus, which limits memory to 16 MB, and the lack of some bus control signals. The cache, the pipeline, the instructions and the coprocessor interface are the same.

Motorola sold the 68020 at 16.67, 20, 25 and 33.33 MHz (and, early on, also at 12.5 MHz), and the 68EC020 at 16.67 and 25 MHz. The 68020 came in a 114-pin ceramic PGA; the 68EC020 also came in a 100-pin plastic QFP, cheaper to solder in mass production.

The 68020 was the processor of the Macintosh II (1987) and the Macintosh LC. It was in Sun-3 workstations and in the Apollo DN3000 and DN4000, and in HP oscilloscopes.

Many of these systems paired it with a 68881 or 68882 for the maths and, in Unix workstations, a memory management unit, either Motorola's 68851 or one made by the manufacturer.

Commodore's first big accelerator was the A2620, from 1988, for the A2000's processor slot: a 68020 at 14 MHz, with the 68851 memory management unit, a 68881 coprocessor and 2 or 4 MB of 32-bit memory.

The Amiga 1200 and the CD32 have a 68EC020 at 14 MHz, in a 100-pin QFP soldered to the board. It is the part marked MC68EC020FG16, made for 16 MHz but used at 14.19 MHz in PAL machines and 14.32 MHz in NTSC ones. Without Fast RAM, the A1200 runs well below what the processor can deliver, because it has to fight the graphics chips for Chip RAM.